Volume 4 Number 5 (Oct. 2012)
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IJCEE 2012 Vol.4(5): 679-683 ISSN: 1793-8163 DOI: 10.7763/IJCEE.2012.V4.583

An FPGA Based Architecture for Moving Target Indication (MTI) Processing Using IIR Filters

Ali Arshad, Fakhar Ahsan, Zulfiqar Ali, Umair Razzaq, and Sohaib Sajid
Abstract—Design and implementation of an IIR filter based Moving Target Indication (MTI) processor is presented. IIR filters offer an advantage compared to FIR filters in terms of hardware resources but are prone to problems in implementation. These are variable overflows and accumulating error. This results in a need for calculation of range and error bounds for the filter variables. This paper presents a method for dealing with these issues and proposes a time shared architecture for the processor. The design is implemented on a Virtex-4SX35 device on the Xilinx Xtreme DSP kit. The processor is tested using unprocessed baseband data from a working TA-10K air traffic control radar.

Index Terms—Fixed point issues, FPGA; IIR filter; Moving Target Indication (MTI).

Ali Arshad, Fakhar Ahsan, Zulfiqar Ali, and Umair Razzaq are with Irtiqa Technologies Islamabad, Pakistan (e-mail: ali@irtiqa.com, fakhar59@hotmail.com, zulfiqar@irtiqa.com, umair@irtiqa.com).
Sohaib Sajid is a student at Nanyang Technological University, Singapore (e-mail: sohaib1@e.ntu.edu.sg).

Cite: Ali Arshad, Fakhar Ahsan, Zulfiqar Ali, Umair Razzaq, and Sohaib Sajid, "An FPGA Based Architecture for Moving Target Indication (MTI) Processing Using IIR Filters," International Journal of Computer and Electrical Engineering vol. 4, no. 5, pp. 679-683, 2012.

General Information

ISSN: 1793-8163 (Print)
Abbreviated Title: Int. J. Comput. Electr. Eng.
Frequency: Quarterly
Editor-in-Chief: Prof. Yucong Duan
Abstracting/ Indexing: EI (INSPEC, IET), Ulrich's Periodicals Directory, Google Scholar, EBSCO, ProQuest, and Electronic Journals Library
E-mail: ijcee@iap.org

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