Volume 3 Number 6 (Dec. 2011)
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IJCEE 2011 Vol.3(6): 789-794 ISSN: 1793-8163 DOI: 10.7763/IJCEE.2011.V3.421

A 5-Level Three-Phase Cascaded Hybrid Multilevel Inverter

P. Thongprasri

Abstract—This paper presents a 5-level three-phase cascaded hybrid multilevel inverter that consists of a standard 3-leg (one leg for each phase) and H-bridge in series with each inverter leg with separate DC voltage sources, 24V and 48V. The control signals for this hybrid multilevel inverter are implemented by a FPGA controller using PWM signal modulated technique and digital technique. A 5-level three-phase cascaded hybrid multilevel inverter model based on PSCAD/EMTDC is presented in this paper. The proposed hybrid multilevel inverter is described in detail that it is verified experimentally in three types of load; 18W fluorescent lamp-ballast, RL, and 1HP 3-phase induction motor; without filtering. Results of the experiment; the output waveform of line-line and phase voltages has 5 levels that percent of THD is between 15.6% and 18.3%, the output waveform of phase current is close to sinusoidal that percent of THD is between 2.7% and 4.2%.

Index Terms—Hybrid multilevel inverter, PSCAD/EMTDC, FPGA controller, h-bridge

P. Thongprasri is with the Department of Electrical Engineering, Faculty of Engineering at Si Racha, Kasetsart University Si Racha Campus, Chonburi, Thailand (e-mail: sfengprt@ src.ku.ac.th).

Cite: P. Thongprasri, "A 5-Level Three-Phase Cascaded Hybrid Multilevel Inverter," International Journal of Computer and Electrical Engineering vol. 3, no. 6, pp. 789-794, 2011.

General Information

ISSN: 1793-8163 (Print)
Abbreviated Title: Int. J. Comput. Electr. Eng.
Frequency: Quarterly
Editor-in-Chief: Prof. Yucong Duan
Abstracting/ Indexing: EI (INSPEC, IET), Ulrich's Periodicals Directory, Google Scholar, EBSCO, ProQuest, and Electronic Journals Library
E-mail: ijcee@iap.org

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