Volume 2 Number 6 (Dec. 2010)
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IJCEE 2010 Vol.2 (6): 1010-1017 ISSN: 1793-8163
DOI: 10.7763/IJCEE.2010.V2.268

FPGA Implementation of Simplified SVPWM Algorithm for Three Phase Voltage Source Inverter

D. N. Sonawane, M. S. Sutaone , B. N. Choudhari and Abhijeet Badurkar

Abstract—A resource efficient with low computational overheads SVPWM algorithm for three phase voltage source inverter which is used to supply variable voltage and variable frequency to three phase AC drives is proposed in this paper. Because of its advantages like lower switching losses, higher dcbus utilization SVPWM scheme becomes the preferred PWM technique for various three-phase power converter applications. Conventional SVPWM algorithm involves complex mathematics and requires more hardware resources to implement and takes more time for its execution. The Field Programmable Gate Arrays (FPGAs) offer high computational ability and flexibility due to their parallel execution and reconfigurable hardware. Hence the scheme suggests the implementation of a resource efficient algorithm with low computational overheads for SVPWM generation using FPGA and obtains higher sampling rates with minimal use of hardware resources. Resource utilization of proposed algorithm obtained is 4% for XILINX XC3S500E processor operating at 50 MHz. The output fundamental frequency can be adjusted from 0.1Hz to 1500Hz and PWM switching frequency can be set from 200 to 50 KHz. The adjustable delay time logic for PWM gating signals is also implemented. The proposed algorithm is tested for 3-phase induction motor with VSI and the experimented results are validated.

Index Terms—Digital Control, FPGA, SVPWM, Xilinx XC3S500E

D. N. Sonawane is with the Department of Instrumentation and Control of College of Engineering, Pune-411005, MH,INDIA (91-020- 25507185;fax: 91-020-25507299; e-mail: dns.instru@ coep.ac.in).
M. S. Sutaone is with Department of Electronics and Communication of College of Engineering, Pune-411005, MH, INDIA (91-020- 25507141; fax:91-020-25507299; e-mail: mssutaone@ extc.coep.org.in)
B. N. Choudhari is with Department of Electrical Engineering of College of Engineering, Pune-411005, MH, INDIA (91-020- 25507112; fax:91-020-25507299; e-mail: bnc.elec@ coep.ac.in)

Cite: D. N. Sonawane, M. S. Sutaone , B. N. Choudhari and Abhijeet Badurkar, "FPGA Implementation of Simplified SVPWM Algorithm for Three Phase Voltage Source Inverter," International Journal of Computer and
Electrical Engineering
vol. 2, no. 6, pp. 1010-1017, 2010.

General Information

ISSN: 1793-8163
Frequency: Quarterly
Editor-in-Chief: Prof. Yucong Duan
Abstracting/ Indexing: EI (INSPEC, IET), Ulrich's Periodicals Directory, Google Scholar, EBSCO, ProQuest, and Electronic Journals Library
E-mail: ijcee@iap.org

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