Volume 4 Number 6 (Dec. 2012)
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IJCEE 2012 Vol.4(6): 937-939 ISSN: 1793-8163 DOI: 10.7763/IJCEE.2012.V4.640

Throughput Optimum Architecture of KECCAK Hash Function

A. Gholipour and S. Mirzakuchaki
Abstract—Because of the weakening of the widely-used SHA-1 hash algorithm and concerns over the similarly-structured algorithms of the SHA-2 family; the US NIST has initiated the SHA-3 contest in order to select a suitable drop-in replacement. In this paper we use the unrolling method to describe the high-speed hardware implementation of the SHA-3 hash function candidate KECCAK on FPGA devices.

Index Terms—Hash function, SHA-3, hardware implementation, KECCAK.

A. Gholipour is with the Iran University of Science and Technology, Tehran, Iran (e-mail: a_gholipour@elec.iust.ac.ir).
S. Mirzakuchaki is with the Electrical Engineering Department, Iran University of Science and Technology, Tehran, Iran (e-mail: m_kuchaki@iust.ac.ir).

Cite: A. Gholipour and S. Mirzakuchaki, "Throughput Optimum Architecture of KECCAK Hash Function,"International Journal of Computer and Electrical Engineering vol. 4, no. 6, pp. 937-939, 2012.

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General Information

ISSN: 1793-8163 (Print)
Abbreviated Title: Int. J. Comput. Electr. Eng.
Frequency: Quarterly
DOI: 10.17706/IJCEE
Editor-in-Chief: Prof. Yucong Duan
Abstracting/ Indexing: INSPEC, Ulrich's Periodicals Directory, Google Scholar, EBSCO, ProQuest, and Electronic Journals Library
E-mail: ijcee@iap.org

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