Volume 2 Number 5 (Oct. 2010)
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IJCEE 2010 Vol.2 (5): 860-866 ISSN: 1793-8163
DOI: 10.7763/IJCEE.2010.V2.241

Performance Evaluation of Nonlinear Pipeline through UML

Vipin Saxena and Manish Shrivastava

Abstract—Complex numerical computations often use repeated arithmetic operations. Pipelining is an architectural approach for speeding up the floating-point arithmetic operations. In pipelining, a task is partitioned into simpler computational steps that can be executed concurrently. In high performance computing, the multi-core technology has emerged as one of the major technologies that support such pipeline architecture. In this paper, the performance of Intel Dual Core processor has been evaluated for floating-point arithmetic operations. A common software program computing floating-point arithmetic has been developed in Visual C++ and Visual C# languages and the performance of these programs is measured on Intel Dual Core processor. To demonstrate the performance, a well known Unified Modeling Language (UML) is used for modeling of floating-point nonlinear pipeline. The UML class, activity and sequence diagrams are designed and results are presented in the form of tables and graphs.

Index Terms—Nonlinear Pipeline, Dual Core Processor,Floating-point, UML class diagram, UML sequence diagram

Cite: Vipin Saxena and Manish Shrivastava, "Performance Evaluation of Nonlinear Pipeline through UML," International Journal of Computer and Electrical Engineering vol. 2, no. 5, pp. 860-866, 2010.

General Information

ISSN: 1793-8163
Frequency: Quarterly
Editor-in-Chief: Prof. Yucong Duan
Abstracting/ Indexing: EI (INSPEC, IET), Ulrich's Periodicals Directory, Google Scholar, EBSCO, ProQuest, and Electronic Journals Library
E-mail: ijcee@iap.org

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