Abstract—Processors of Fast Fourier Transform (FFT) and its inverse transform IFFT are a key component in OFDM based wireless broadband communication systems. It is essential to develop a high-speed and low-power performance FFT/IFFT processor to meet the real time and low cost prerequisites in such communication systems. This paper gives the details of the development of efficient 256-points FFT/IFFT architecture to be used in OFDM system and which satisfies the specification of IEEE 802.16a standard. The 256-points FFT architecture consists of an optimized pipeline implementation of 16-point FFT core based on Radix-2 butterfly Processor Element. This proposed design reduces the multiplicative complexity compared to other efficient architectures. The FFT processor has been implemented in VHDL code, and simulation results show that this FFT module significantly achieves a better performance with low arithmetic complexity. Hence high speed and low power consumption for OFDM-based wireless broadband communication systems.

Index Terms—FFT/IFFT, FPGA, IEEE 802.16a, MDC, OFDM, Radix-2, SDF, wireless broadband communication.

M. Arioua is with the National School of Applied Sciences, University of Abdelmalek Essaadi Tetouan-Tanger, B.P.2222 M'hannech, Morocco (email: m.arioua@ieee.org). M. M. Hassani is with the Faculty of Science of Marrakech at Cadi Ayyad University, B.P.511- 40000, Morocco (email: hassani@ucam.ac.ma).

 

Cite:M. Arioua and M. M. Hassani, "Low Complexity FFT/IFFT Processor Applied for OFDM Transmission System in Wireless Broadband Communication," International Journal of Computer and Electrical Engineering vol. 6, no.2, pp. 167-171, 2014.