Abstract—Today, a high-performance and low-power processor is required. Even on an embedded processor, a large cache is implemented to achieve high performance, and leakage energy in such large cache has been increasing caused by scale down of semiconductor device. Therefore, reduction of cache leakage energy is very important. To reduce cache leakage energy, we propose a variable level cache (VLC) which reduces leakage energy with a little performance degradation. Generally, a required size of a cache depends on a program behavior. VLC dynamically estimates whether the current cache size is suitable for a running program, and if not VLC modifies its cache structure and cache hierarchy to change cache capacity. Since changing the cache construction and hierarchy incurs a large overhead, VLC adopts the low-overhead technique which reduces hierarchy changing overhead to prevent performance from degrading. However, previous VLC has a problem that dynamic energy consumption is increased because the technique needs many futile accesses. To solve the problem, this paper proposes the novel technique which reduces the number of the futile accesses to reduce dynamic energy consumption. According to our simulation results, the proposed VLC technique reduces 18% dynamic energy without performance degradation compared with the previous VLC.

Index Terms—Low-power and high-performance cache, variable level cache, leakage energy, dynamic energy.

The authors are with the Graduate School of Engineering Mie University, Tsu, Mie 514-8507, Japan (e-mail:{watanabe, sasaki, tomoyuki, ohno, kondo}@arch.info.mie-u.ac.jp).

Cite:Ko Watanabe, Takahiro Sasaki, Tomoyuki Nakabayashi, Kazuhiko Ohno, and Toshio Kondo, "Reducing Dynamic Energy of Variable Level Cache," International Journal of Computer and Electrical Engineering vol. 5, no.6, pp. 581-586, 2013.