Volume 5 Number 4 (Aug. 2013)
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IJCEE 2013 Vol.5(4): 410-413 ISSN: 1793-8163
DOI: 10.7763/IJCEE.2013.V5.742

Detail Power Analysis of the SHA-3 Hashing Algorithm Candidates on Xilinx Spartan-3E

Amar Jaffar and Christopher J. Martinez
Abstract—The United States National Institute of Standards and Technology (NIST) created an open competition to find a new standard for cryptographic hashing in 2007. The competition was composed of a number of rounds that ended with 5 finalists (BLAKE, Grostl, JH, Keccak, Skein) in December of 2010. This research paper will examine the power consumption of the 5 finalists on the Xilinx Spartan3E FPGA. The results in this paper will allow developers examining including a hash function in a hardware design to have a full understanding of the power requirements and aid the developer in making an inform decision. The results show that the Keccak algorithm has the best tradeoff of power to speed and the BLAKE algorithm is the best choice for low power design.

Index Terms—FPGA, hashing, power analysis, SHA-3

A. Jaffar and C. Martinez are with the University of New Haven, West Haven, CT 06516 USA (e-mail: ajaff1@unh.newhaven.edu; cmartinez@newhaven.edu).


Cite:Amar Jaffar and Christopher J. Martinez, "Detail Power Analysis of the SHA-3 Hashing Algorithm Candidates on Xilinx Spartan-3E," International Journal of Computer and Electrical Engineering vol. 5, no. 4, pp. 410-413, 2013.

General Information

ISSN: 1793-8163 (Print)
Abbreviated Title: Int. J. Comput. Electr. Eng.
Frequency: Quarterly
Editor-in-Chief: Prof. Yucong Duan
Abstracting/ Indexing: EI (INSPEC, IET), Ulrich's Periodicals Directory, Google Scholar, EBSCO, ProQuest, and Electronic Journals Library
E-mail: ijcee@iap.org

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