Volume 1 Number 5 (Dec. 2009)
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IJCEE 2009 Vol.1 (5): 602-609 ISSN: 1793-8163
DOI: 10.7763/IJCEE.2009.V1.93

Double Bits Error Correction for Computational Grid with CRC

Nima Jafari Navimipour, Seyed Hasan Es-hagi

Abstract—In grid system error during sending information due to devastating factors like external electromagnetic sources and noise is inevitable. The Cyclic Redundancy Check (CRC) method is used for error detection. CRC is used to control such factors in received information. In this paper, the new method based on CRC has been introduced that is able to detect the exact place of double bits error and correct them. In this method the receiver divide the received data on polynomial generator, g(x), and then get the remainder. Receiver can correct double bits error by comparing the remainder and the content of the look-up table. The result show that presented method can reduce the traffic for application that have low bit error rate (BER).

Index Terms—CRC; Error Correction; Computational Grid

Nima Jafari Navimipour is with Islamic Azad University, Tabriz Branch, Tabriz, Iran, phone: +989144021694; fax: +984115552322; e-mail: Jafari@iaut.ac.ir and Jafari_n@ymail.com
Seyes Hasan Es-hagi is member of Young Researchers Club, Tabriz Branch, Islamic Azad University, Tabriz Branch, Tabriz, Iran phone:+989143171845; fax: +984114201024; e-mail: es-hagi@iaut.ac.ir andes_hagi@gmail.com

Cite: Nima Jafari Navimipour and Seyed Hasan Es-hagi, "Double Bits Error Correction for Computational Grid with CRC," International Journal of Computer and Electrical Engineering vol. 1, no. 5, pp. 602-609, 2009.

General Information

ISSN: 1793-8163
Frequency: Quarterly
Editor-in-Chief: Prof. Yucong Duan
Abstracting/ Indexing: EI (INSPEC, IET), Ulrich's Periodicals Directory, Google Scholar, EBSCO, ProQuest, and Electronic Journals Library
E-mail: ijcee@iap.org

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